etc:users:jcmvbkbc:hardware
Differences
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| Both sides previous revisionPrevious revision | |||
| etc:users:jcmvbkbc:hardware [2026/08/29 16:41] – add SPI pinout and pyftdi example jcmvbkbc | etc:users:jcmvbkbc:hardware [2026/08/29 16:52] (current) – jcmvbkbc | ||
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| Line 45: | Line 45: | ||
| === SPI master === | === SPI master === | ||
| == Pin functions == | == Pin functions == | ||
| - | * 5: SDO | + | * 5: MOSI |
| - | * 7: SCL | + | * 7: CS0 |
| * 9: SCK | * 9: SCK | ||
| - | * 13: SDI (pulled up by default) | + | * 13: MISO (pulled up by default) |
| == PyFTDI-based example == | == PyFTDI-based example == | ||
| + | API doc: https:// | ||
| < | < | ||
| from pyftdi import ftdi, spi | from pyftdi import ftdi, spi | ||
| Line 61: | Line 62: | ||
| ctrl = spi.SpiController() | ctrl = spi.SpiController() | ||
| ctrl.configure(" | ctrl.configure(" | ||
| - | spi = ctrl.get_port(freq = 10000000, cs = 0) | + | port = ctrl.get_port(freq = 1000000, cs = 0) |
| - | ... | + | |
| + | port.write(b' | ||
| + | port.read(1, start = False, stop = False, droptail = 4) # dummy phase, 4 clock cycles | ||
| + | port.read(1, start = False, stop = True) # read phase, 1 byte | ||
| </ | </ | ||
etc/users/jcmvbkbc/hardware.txt · Last modified: 2026/08/29 16:52 by jcmvbkbc