Differences

This shows you the differences between two versions of the page.

--- etc:users:jcmvbkbc:linux-xtensa:esp32s3:mmu [2024/02/06 16:52] – jcmvbkbc
+++ etc:users:jcmvbkbc:linux-xtensa:esp32s3:mmu [2024/02/09 01:35] (current) – jcmvbkbc
@@ Line 5: / Line 5: @@
 ===== ESP32S3 =====
-32-bit entries starting at DR_REG_MMU_TABLE (0x600C5000). First 0x180 entries control mapping of the virtual address range 0x42000000..0x43800000 connected to an IRAM bus. Next 0x80 entries control mapping of the virtual address range 0x3d800000..0x3e000000 connected to the DRAM bus. Bit 15 of the entry chooses PSRAM (if set) or FLASH (if clear), bit 14 of the entry indicates invalid entry (if set), lower bits choose one 64KByte page. There must be more entries to fill two 32MByte ranges advertised in the TRM and there may be registers that choose what ranges of MMU table correspond to what virtual addresses, unknown ATM.
+32-bit entries starting at DR_REG_MMU_TABLE (0x600C5000). They control mapping of the virtual address ranges 0x3c000000..0x3e000000 connected to a DRAM bus and 0x42000000..0x44000000 connected to an IRAM bus. Bit 15 of the entry chooses PSRAM (if set) or FLASH (if clear), bit 14 of the entry indicates invalid entry (if set), lower bits choose one 64KByte page mapped to both DRAM and IRAM range.