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--- etc:users:jcmvbkbc:mpc85xx-qemu-linux [2010/01/24 05:41] – jcmvbkbc
+++ user:jcmvbkbc:mpc85xx-qemu-linux [2016/08/07 00:17] – ↷ Page moved from etc:users:jcmvbkbc:mpc85xx-qemu-linux to user:jcmvbkbc:mpc85xx-qemu-linux kel
@@ Line 52: / Line 52: @@
   * configure qemu: ../qemu/configure --enable-system --disable-linux-user --enable-fdt --target-list=ppc-softmmu --prefix=`pwd`/root "$@"
   * apply some patches :TODO:
@@ Line 64: / Line 65: @@
   * what's the initial MMU setup on entry to kernel? see arch/powerpc/kvm/e500_tlb.c, esp. kvmppc_e500_tlb_setup;
   * why exception in the first mfmsr? mmu_idx, mem_idx -- ??
-  * implement tlbsx (done), tlbre (done), tlbwe (done), tlbivax for BookE (needed by arch/powerpc/kernel/head_fsl_booke.S)
+  * implement tlbsx (done), tlbre (done), tlbwe (done), tlbivax (done) for BookE (needed by arch/powerpc/kernel/head_fsl_booke.S)
   * how softmmu works? how to substitute existing PPC softmmu by TLB-based one?
   * what is hardware TLB entry replacement policy/hash function?
+  * need to refactor the whole TLB thing for BookE PPC
 ===== References =====