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etc:users:jcmvbkbc:qemu-target-xtensa

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QEMU support for Xtensa

Things to do

  • core/basic opcodes implementation;
    • [+] and/or/xor/neg/abs;
    • [+] shifts;
    • [+] add[x*]/sub[x*]/add.n/addi.n;
    • [+] call0, callx0, j, b*;
    • [+] l32*, s32*;
    • [+] accurate SR write semantics;
    • [-] boolean registers/commands;
  • windowed registers;
    • [+] call*/callx*, retw, rotw, rfwo, rfwu;
    • [+] simple overflow algorithm that's triggered from ENTER;
    • [+] accurate overflow triggering;
  • [+] loop option;
  • [+] extended L32R option;
  • [-] floating point;
  • MMU;
    • [+] no-MMU mode;
    • [+] proper mem_idx usage;
    • [-] region protection (with/without translation);
    • [+] MMU mode;
  • gdbserver;
    • [+] xml register map, read/write register;
    • [+] correct SR mapping;
    • [+] debug exception, single step mode;
    • [+] hw/sw breakpoints;
    • [-] gdbserver for different processor types;
  • [-] debug option;
  • exceptions;
    • [+] debug (only external);
    • [-] break;
    • [+] window overflow/underflow;
    • [+] user/kernel (invalid insn, privileged insn, alignment, division by 0,…);
    • [+] relocatable vectors;
    • [+] external interrupts;
    • [+] timer interrupts;
      • [-] correct opcode timings?;
      • [+] qemu timer to avoid busy looping in waiti;
  • sample evaluation board;
    • [+] memory mapping, ELF loader;
    • [-] standard peripherals;
    • [+] dc232b;
  • simulation quality;
    • [+] pass command line arguments to argc/argv SIMCALLs (DAN branch only);
    • [+] TB chaining;
  • [+] external configuration (a-la xtensa overlay)?
  • [-] automatic regression test suite;

Events

etc/users/jcmvbkbc/qemu-target-xtensa.1308965053.txt.gz · Last modified: 2011/06/25 05:24 (external edit)